Analog to digital converters (ADCs) with delta-sigma modulators may be used in signal processing chains ranging from narrow band applications (e.g., instrumentation, voice, audio, etc.) to relatively wide band applications (e.g., DSL, WiFi, TV, etc.). For high-frequency applications such as analog and digital television, low-oversampling ratio (OSR), higher order delta-sigma modulators (DSM) with multi-bit quantizers are often used.
Higher order loops in delta-sigma modulators may be realized using either distributed feed-back (DFB) or distributed feed-forward (DFF) topologies. Because of lower internal signal swings and fewer feedback digital to analog converters (DACs), DFF topologies are often chosen. Compared to DFB topologies, however, DFF topologies may result in higher out of band signal transfer function (STF) peaking. The peaking may be more pronounced in ADCs with multi-bit quantizers because more aggressive loop scaling can be done without compromising loop stability compared to delta-sigma modulators with single-bit quantizers.
Out of band STF peaking is a serious concern for applications where large close-in blockers (such as television) may be present in the vicinity of the desired channel. A baseband or intermediate frequency (IF) filter preceding the ADC may not sufficiently reduce these blockers to a level that ensures that the ADC will not become unstable. Although the maximum ADC input level may be managed to ensure that residual blockers do not overload the ADC, any reduction in the ADC input level may reduce the in-band dynamic range of the ADC.